Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 4/01/2024
Public

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3.11. Add IP RTL Core Generated from the Intel® oneAPI Base Toolkit

The Intel® oneAPI Base Toolkit is a core set of tools and libraries for developing high-performance, data-centric applications across diverse architectures. The toolkit features the Intel® oneAPI DPC++/C++ Compiler that implements SYCL*, an evolution of C++ for heterogeneous computing. The compiler uses SYCL* code to generate RTL IP cores, depending on the compilation target that you specify.

For RTL IP cores, you set the compilation target to a supported Intel® FPGA device family or part number instead of a specific acceleration platform. Users of the Intel HLS Compiler are encouraged to migrate existing designs to the Intel oneAPI Base Toolkit, as Intel HLS Compiler is planned for deprecation after Quartus® Prime Pro Edition version 23.4.

To learn more about the Intel® oneAPI FPGA flows in Platform Designer that use SYCL HLS, refer to the Intel® oneAPI FPGA Handbook and the Platform Designer Sample Tutorial.