AN 738: Intel® Arria® 10 Device Design Guidelines

ID 683555
Date 6/30/2017
Document Table of Contents Quartus Prime Power Optimization Techniques

The Quartus® Prime software offers power-optimized synthesis and fitting to reduce core dynamic power. Power-driven compilation works in conjunction with Programmable Power Technology in Arria® 10 silicon.

Optimizing your design for area also saves power because fewer logic blocks are used; therefore, there is typically less switching activity. Improving your design source code to optimize for performance can also reduce power usage because more of the design might be placed using low power tiles instead of requiring the high-performance mode. You can use the DSE and Power Optimization Advisor to provide additional suggestions to reduce power.