AN 738: Intel® Arria® 10 Device Design Guidelines

ID 683555
Date 6/30/2017
Document Table of Contents

1.1.1. Design Specifications

Table 2.  Design Specifications Checklist
Number Done? Checklist Item
1   Create detailed design specifications and a test plan if appropriate.
2   Plan clock domains, clock resources, and I/O interfaces early with a block diagram.

Create detailed design specifications that define the system before you create your logic design or complete your system design, by performing the following:

  • Specify the I/O interfaces for the FPGA
  • Identify the different clock domains
  • Include a block diagram of basic design functions
  • Include intellectual property (IP) blocks
    Note: Taking the time to create these specifications improves design efficiency, but this stage is often skipped by FPGA designers.
  • Create a functional verification/test plan
  • Consider a common design directory structure

Create a functional verification plan to ensure the team knows how to verify the system. Creating a test plan at this stage can also help you design for testability and design for manufacturability. For example, do you want to perform built-in-self test (BIST) functions to drive interfaces? If so, you could use a UART interface with a Nios® processor inside the FPGA device. You might require the ability to validate all the design interfaces.

If your design includes multiple designers, it is useful to consider a common design directory structure. This eases the design integration stages.