AN 738: Intel® Arria® 10 Device Design Guidelines

ID 683555
Date 6/30/2017
Document Table of Contents Device and Design Power Optimization Techniques

This section lists several design techniques that can reduce power consumption. The results of these techniques are different from design to design.

Arria® 10 devices also offer the following power saving techniques:

  • SmartVID
  • VCC Power Manager
  • Programmable Power Technology
  • Low Stratix Power Device Grades
    Table 64.  Device and Design Power Optimization Techniques Checklist
    Number Done? Checklist Item
    1   Use recommended design techniques and Quartus® Prime options to optimize your design for power consumption, if required.
    2   Use the Power Optimization Advisor to suggest optimization settings.

If your design includes many critical timing paths that require the high-performance mode, you might be able to reduce power consumption by using a faster speed grade device if available. With a faster device, the software might be able to set more device tiles to use the low-power mode.