Intel® Quartus® Prime Standard Edition User Guide: Power Analysis and Optimization

ID 683506
Date 12/07/2020
Public
Document Table of Contents

1.3.2.1. Using Simulation Signal Activity Data in Power Analysis

You can specify a Verilog Value Change Dump File (.vcd) generated by a supported1 simulator as the source of signal activity data for power analysis.

Third-party simulators can output a .vcd that contains signal activity and static probability information that inform the power analysis. The generated .vcd includes all of the routing resources and the exact logic array resource usage.

Figure 5. Using Simulation Signal Activity Data in Power Analysis

For third-party simulators, use the EDA Tool Settings to specify the Generate Value Change Dump (VCD) file script option in the Simulation page of the Settings dialog box. These scripts instruct the third-party simulators to generate a .vcd that encodes the simulated waveforms. The Intel® Quartus® Prime Power Analyzer reads this file directly to derive the toggle rate and static probability data for each signal.

1 ModelSim® , ModelSim* - Intel® FPGA Edition, QuestaSim, Active-HDL, NCSim, VCS* , VCS* MX, Riviera-PRO*

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