Intel® Quartus® Prime Standard Edition User Guide: Power Analysis and Optimization

ID 683506
Date 12/07/2020
Public
Document Table of Contents

1.3.2.2. Signal Activities from RTL (Functional) Simulation, Supplemented by Vectorless Estimation

In the functional simulation flow, simulation provides toggle rates and static probabilities for all pins and registers in your design. Vectorless estimation fills in the values for all the combinational nodes between pins and registers, giving good results. This flow usually provides a compilation time benefit when you use the third-party RTL simulator.

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