40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide

ID 683114
Date 6/15/2022
Public
Document Table of Contents

3.2. 40-100GbE MAC and PHY Functional Description

The 40‑100GbE IP core implements the 40‑100GbE Ethernet MAC in accordance with the IEEE 802.3ba 2010 40G and 100G Ethernet Standard. This IP core handles the frame encapsulation and flow of data between a client logic and Ethernet network via a 40‑100GbE Ethernet PCS and PMA (PHY).

In the transmit direction, the MAC accepts client frames, and inserts inter-packet gap (IPG), preamble, start of frame delimiter (SFD), padding, and CRC bits before passing them to the PHY. The PHY encodes the MAC frame as required for reliable transmission over the media to the remote end.

In the receive direction, the PHY passes frames to the MAC. The MAC accepts frames from the PHY, performs checks, updates statistics counters, strips out the CRC, preamble, and SFD, and passes the rest of the frame to the client. In RX preamble pass-through mode, the MAC passes on the preamble and SFD to the client instead of stripping them out.

The MAC includes the following interfaces:

  • Datapath client-interface–The following options are available:
    • 40GbE with adapters—Avalon‑ST, 256 bits
    • 40GbE—Custom streaming, 128 bits
    • 100GbE with adapters—Avalon‑ST, 512 bits
    • 100GbE—Custom streaming, 320 bits
  • Datapath PHY side–The following options are available:
    • 40GbE—XLAUI
    • 100GbE—CAUI, CAUI–4
  • Management interface—Avalon-MM host slave interface for MAC management. This interface has a data width of 32 bits and an address width of 16 bits.

The PHY includes the following interfaces:

  • Datapath MAC–The following options are available:
    • 40GbE—XLAUI
    • 100GbE—CAUI, CAUI–4
  • Datapath Ethernet interface–The following options are available:
    • 40GbE—Four 10.3125 Gbps serial links
    • 40GbE 24.24—Four 6.25 Gbps serial links
    • 100GbE—Ten 10.3125 Gbps serial links
    • 100GbE CAUI–4—Four 25.78125 Gbps serial links