GTS Ethernet Intel® FPGA Hard IP User Guide

ID 817676
Date 4/01/2024
Public

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1.1. Agilex™ 5 Ethernet Portfolio and Target Applications

Agilex™ 5 devices serve a broad range of applications that require high performance, lower power, smaller form factors and lower logic densities.

These characteristics make Agilex™ 5 ideal for midrange FPGA applications across the edge and core including:

  • Wireless and wireline communications
  • Video and broadcast equipment
  • Industrial applications
  • Test and measurement products
  • Medical electronics
  • Data center
  • Defense applications

The majority of the applications listed above require Ethernet connectivity. Intel provides Ethernet IPs that support these applications.

The following table lists the Agilex™ 5 Ethernet IP Portfolio supported in Quartus® Prime Pro Edition software version 24.1. This user guide focuses on the GTS Ethernet Intel® FPGA Hard IP .

Table 1.   Agilex™ 5 Supported Ethernet IPs
IP Description
GTS Ethernet Intel® FPGA Hard IP GTS Ethernet Intel® FPGA Hard IP includes a configurable, hardened blocks MAC, PCS, and PMA, as well as optional FEC for Ethernet applications. It supports the following:
  • 10G Ethernet mode
  • Direct PCS mode
  • OTN mode
  • FlexE mode with optional FEC
Low Latency 40G Ethernet Intel FPGA IP IP core provides standard Media Access Control (MAC), Physical Coding Sublayer (PCS), and Physical Medium Attachment (PMA) functions.
1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel FPGA IP Includes a Physical Coding Sublayer (PCS) and Physical Media Attachment (PMA). You can dynamically switch the PHY operating speed. The IP uses the GTS Transceiver for serial transmission, with soft logic added to connect the MAC interface.
Low Latency Ethernet 10G MAC Intel® FPGA IP To build a complete Ethernet subsystem in an Intel FPGA device and connect it to an external device, combine the Low Latency Ethernet 10G MAC Intel® FPGA IP with an Intel FPGA PHY IP or any of the supported PHYs.
Triple-Speed Ethernet for Intel® FPGA IP Incorporates a 10/100/1000 Mbps Ethernet Media Access Controller (MAC) as well as an optional 1000 BASE-X/SGMII Physical Coding Sublayer (PCS) with Physical Medium Attachment (PMA) built with on-chip transceiver I/Os or LVDS I/Os.