F-Tile Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 741328
Date 8/16/2024
Public
Document Table of Contents

5.3. Precision Time Protocol

The Altera IEEE 1588v2 provides a timestamp for receiving and transmitting frames in the Triple-Speed Ethernet Intel® FPGA IP designs. This feature consists of Precision Time Protocol (PTP). PTP is a layer-3 protocol that accurately synchronizes all real time-of-day clocks in a network to a master clock.