F-Tile Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 741328
Date 4/15/2024
Document Table of Contents ECC Status Signals

Table 58.  ECC Status Signals
Name I/O Description
mac_eccstatus[1:0] O Indicates the ECC status. This signal is synchronized to the reg_clk clock domain.
  • 11: An uncorrectable error occurred and the error data appears at the output.
  • 10: A correctable error occurred and the error has been corrected at the output. However, the memory array has not been updated.
  • 01: Not valid.
  • 00: No error.