F-Tile Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 741328
Date 8/16/2024
Public
Document Table of Contents

5.2.6. SGMII Converter

You can configure the PCS layer to use SGMII mode or 1000BASE-X mode. To configure to SGMII mode, enable the SGMII converter by setting the SGMII_ENA bit in the if_mode register to 1. When enabled and the USE_SGMII_AN bit in the if_mode register is set to 1, the SGMII converter is automatically configured with the capabilities advertised by the PHY. Otherwise, Altera recommends that you configure the SGMII converter with the SGMII_SPEED bits in the if_mode register.

In 1000BASE-X mode, the PCS function always operates in gigabit mode and data duplication is disabled.