F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 4/03/2023

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5.4.4. 400G FEC/PMA Interface Registers Access Example

The 400G FEC/PMA interface registers are a part of the F-Tile Ethernet Intel FPGA Hard IP register map.
For a design where multiple IP instances are accessed by a single F-Tile Global Avalon® Memory-Mapped Interface Intel® FPGA IP, you need to use the corresponding base address to access the separate IP instances. The following table shows base address for each of the Ethernet modes.
Table 100.  400G FEC/PMA Interface Base Address for Global Avalon® Memory-Mapped Access
Ethernet Mode Base Address (Byte Address)
25GE_0 0x0000
50GE_0 0x0200
100GE_0 0x0600
200GE_0 0x0E00
400GE_0 0x1E00
25GE_1 0x3E00
25GE_2 0x4000
50GE_1 0x4200
25GE_3 0x4600
25GE_4 0x4800
50GE_2 0x4A00
100GE_1 0x4E00
25GE_5 0x5600
25GE_6 0x5800
50GE_3 0x5A00
25GE_7 0x5E00
25GE_8 0x6000
50GE_4 0x6200
100GE_2 0x6600
200GE_1 0x6E00
25GE_9 0x7E00
25GE_10 0x8000
50GE_5 0x8200
25GE_11 0x8600
25GE_12 0x8800
50GE_6 0x8A00
100GE_3 0x8E00
25GE_13 0x9600
25GE_14 0x9800
50GE_7 0x9A00
25GE_15 0x9E00
Note: The table is only applicable for global Avalon® memory-mapped interface access. For local Avalon® memory-mapped interface access, refer to Ethernet Avalon® Memory-Mapped Interface Address Space in the F-Tile Ethernet Intel FPGA Hard IP User Guide.
As an example, if a design has four IPs instantiated and accessed by a single F-Tile Global Avalon® Memory-Mapped Interface Intel® FPGA IP, where:
  • The first IP is a 4x50Gbps module; placed in stream0 to stream7, fracture st_x8_0, Ethernet mode 200GE_0
  • The second IP is a 4x25Gbps module; placed in stream8 to stream11, fracture st_x4_2, Ethernet mode 100GE_2
  • The third IP is a 1x25Gbps module; placed in stream12, fracture st_x1_12, Ethernet mode 25GE_12
  • The fourth IP is a 1x25Gbps module; placed in stream13, fracture st_x1_13, Ethernet mode 25GE_13
Note: Use the F-Tile Channel Placement Tool to find out where each IP module is placed; in which streams, what fracture type, and refer to the Fracture Type and Ethernet Mode Mapping table to determine the Ethernet mode.
To read the RS-FEC settings register:
  1. Write register 0xffffc with value 0x4.
  2. Read the following registers for the RS-FEC settings register value:
    1. For the first IP instance, read register 0x0EC0.
    2. For the second IP instance, read register 0x66C0.
    3. For the third IP instance, read register 0x88C0.
    4. For the fourth IP instance, read register 0x96C0.