AN 839: Design Block Reuse Tutorial: for Intel® Arria® 10 FPGA Development Board

ID 683783
Date 7/26/2019
Public
Document Table of Contents

1.2. Tutorial Software and Hardware

This tutorial assumes a basic understanding of Verilog HDL design and the Intel® Quartus® Prime Pro Edition design flow. The steps in this tutorial correspond with use of the following Intel® software and hardware.
  • Linux installation of Intel® Quartus® Prime Pro Edition software version 18.1, with Intel® Arria® 10 device support.
  • The Intel® Arria® 10GX FPGA Development Kit.
Note: You can also adapt this tutorial for Windows and other software or hardware configurations.

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