AN 839: Design Block Reuse Tutorial: for Intel® Arria® 10 FPGA Development Board

ID 683783
Date 7/26/2019
Public
Document Table of Contents

1.4. Core Partition Reuse—Developer Tutorial

Follow the steps in this tutorial module to develop a core partition for export and reuse in a Consumer project.

Process Description

As an IP Developer, you define, place, route, and eventually export a block of code within a partition. You then pass the exported .qdb to a Consumer.

Figure 3. Core Partition Reuse Flow

Reuse of the core partition also requires that you provide a black box file to the Consumer. The black box file defines the ports and port interface types for synthesis in the Consumer project. The Compiler ignores any further RTL that you include in the black box file.

You add the black box file to the Consumer project as a source file. You assign the exported .qdb file to a partition in the Consumer design. The .qdb file contains all of the information from the Developer's compilation snapshot. The Consumer can then reuse these compilation results in their project. The synthesis snapshot includes only synthesis results. The final snapshot includes synthesis, placement, and routing results.

Completed Tutorial Files

The Core_Partition_Reuse/Completed/Developer/ tutorial directory contains the completed files for this tutorial module.

Command-Line Alternative Step

You can skip Step 1: Define a Core Partition and Step 2: Compile and Export the Core Partition in this tutorial module by adding the following line to the Intel® Quartus® Prime Settings file (.qsf), and then running the Core_Partition_Reuse/Developer/Script/run.sh script.

set_instance_assignment -name PARTITION blinking_led -to \
     u_blinking_led -entity top

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