1.5.4. Step 4: Hardware Verification (Optional)
You can now optionally verify the results of the Core Partition Reuse—Consumer Tutorial module in hardware by completing (Optional) Step 8: Device Programming.
After completing this tutorial module, LEDs D6-D3 map to the blinking_led core, and LEDs D10-D7 map to the top-level design. After configuring the FPGA, the blinking_led core flashes red LEDs in a binary counting order. The top-level design shows a shifting bit in green.
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