184.108.40.206. Generating the LL 40GbE Testbench
A single procedure generates the testbench and example project (for Stratix V variations) or the testbench, compilation-only design example, and hardware design example (for Arria 10 variations). The procedure varies depending on your target device. To generate these demonstration aids:
- Follow the steps in Specifying the IP Core Parameters and Options to parameterize your IP core.
- If your IP core variation targets a Stratix V device, go to step 4.
- If your IP core variation targets an Arria 10 device, in the LL 40GbE parameter editor:
Tip: You are prompted to locate the new testbench and example project in the directory <working directory>/alt_eth_ultra_40_0_example_design . You can accept the default path or modify the path to the new testbench and example project.
- On the Example Design tab, select Simulation, Synthesis, or both to specify whether you want to generate the simulation-only testbench, the compilation-only and hardware design examples, or all three options.
- Click the Generate Example Design button to generate these options for the IP core variation you intend to generate.
- Generate the IP core by clicking Generate HDL for Arria 10 variations or Generate for Stratix V variations.
Note: If your IP core variation targets a Stratix V device, when prompted at the start of generation, you must turn on Generate example design. Turning on Generate example design is the only process that generates a functional testbench and a functional example project for Stratix V variations.
When the IP core is generated in <working directory>, the testbench and example projects are generated in different locations depending on the device family your IP core variation targets.
- For Stratix V variations, the testbench and example project are generated in <working directory>/<IP core variation>_example_design/alt_eth_ultra.
- For Arria 10 variations, the testench and the compilation-only and hardware design examples are generated in the directory you specify in Step 3. If you do not modify the location text at the prompt, they are generated in <working directory>/alt_eth_ultra_40_0_example_design .
The directory with the testbench and design example has four subdirectories for Arria 10 variations and three subdirectories for Stratix V variations:
- ex_40g , for Arria 10 variations only
The ex_40g directory contains a copy of the IP core variation. The testbench and design examples (compilation-only and hardware design example) for your Arria 10 IP core variation connect to the copy in this directory rather than to the copy you generate in <working directory>.
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