Low Latency 40-Gbps Ethernet IP Core User Guide

ID 683745
Date 3/08/2021
Document Table of Contents

3.2.15. Transceiver PHY Serial Data Interface

The core uses an <n>-lane digital interface to send data to the TX high-speed serial I/O pins operating at 10.3125 Gbps. The rx_serial and tx_serial ports connect to the 10.3125 Gbps pins. Virtual lanes 0 and 1 transmit data on tx_serial[0].