Low Latency 40-Gbps Ethernet IP Core User Guide

ID 683745
Date 3/08/2021
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2.7.2. External Transceiver Reconfiguration Controller Required in Stratix V Designs

LL 40GbE IP cores that target Stratix V devices require an external reconfiguration controller to compile and to function correctly in hardware. LL 40GbE IP cores that target Arria 10 devices include a reconfiguration controller block in the PHY component and do not require an external reconfiguration controller.

You can use the IP Catalog to generate an Transceiver Reconfiguration Controller.

When you configure the Transceiver Reconfiguration Controller, you must specify the number of reconfiguration interfaces. Stratix V LL 40GbE IP cores require 8 reconfiguration interfaces.

You can configure your reconfiguration controller with additional interfaces if your design connects with multiple transceiver IP cores. You can leave other options at the default settings or modify them for your preference.

You should connect the reconfig_to_xcvr, reconfig_from_xcvr, and reconfig_busy ports of the LL 40GbE IP core to the corresponding ports of the reconfiguration controller.

You must also connect the mgmt_clk_clk and mgmt_rst_reset ports of the Transceiver Reconfiguration Controller. The mgmt_clk_clk port must have a clock setting in the range of 100–125MHz; this setting can be shared with the LL 40GbE IP core clk_status port. The mgmt_rst_reset port must be deasserted before, or deasserted simultaneously with, the LL 40GbE IP core reset_async port.

Refer to the example project for RTL that connects the transceiver reconfiguration controller to the IP core.

Table 14.  External Transceiver Reconfiguration Controller Ports for Connection to LL 40GbE IP Core 

Signal Name

Direction

Description

reconfig_to_xcvr[559:0]

Input

The LL 40GbE IP core reconfiguration controller to transceiver port in Stratix V devices.

reconfig_from_xcvr[367:0]

Output

The LL 40GbE IP core reconfiguration controller from transceiver port in Stratix V devices.

reconfig_busy

Input

Indicates the reconfiguration controller is still in the process of reconfiguring the transceiver.