Low Latency 50G Ethernet Intel FPGA IP Core User Guide: For Intel® Stratix® 10 Devices

ID 683675
Date 12/14/2020
Document Table of Contents

4.1.2. Preamble Insertion

In the TX datapath the MAC prepends an eight-byte preamble to the client frame. If you turn on Enable link fault generation, this MAC module also incorporates the functions of the reconciliation sublayer (RS).

The source of the 7-byte preamble (including a Start byte) and 1-byte SFD depends on whether you turn on Enable preamble passthrough in the parameter editor.

If the preamble pass-through feature is enabled, the client provides the eight-byte preamble (comprising seven bytes of preamble, and final 1-byte SFD) on a dedicated preamble bus, l2_tx_preamble[63:0]. In this case, the client is responsible for providing the correct Start byte (0xFB) and an appropriate SFD byte. If the preamble pass-through feature is disabled, the MAC inserts the standard Ethernet preamble in the transmitted Ethernet frame.

When l2_tx_startofpacket is asserted, l2_tx_preamble[63:0] contains the preamble data and l2_tx_data[127:0] contains the first 16 bytes of frame data, starting from destination address.

Note: A single parameter in the Low Latency 50G Ethernet IP parameter editor turns on both RX and TX preamble passthrough.

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