Low Latency 50G Ethernet Intel FPGA IP Core User Guide: For Intel® Stratix® 10 Devices

ID 683675
Date 12/14/2020
Document Table of Contents

1.4.2. Compilation Checking

Intel® performs compilation testing on an extensive set of Low Latency 50G Ethernet IP core variations and designs to ensure the Intel® Quartus® Prime Pro Edition software places and routes the IP core ports correctly.

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