Intel® Quartus® Prime Standard Edition User Guide: Power Analysis and Optimization

ID 683506
Date 9/24/2018
Public

Visible to Intel only — GUID: bhc1519432305637

Ixiasoft

Document Table of Contents

2.6.1. Set Realistic Timing Constraints

Timing requirements are too high, the Compiler increases HST Usage. In addition, the Fitter efforts focus more in timing than power optimization.