R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 12/19/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.6.2. Enabling the R-Tile Debug Toolkit

To enable the R-tile Debug Toolkit in your design, enable the option Enable Debug Toolkit in the Top-Level Settings tab of the R-tile Avalon Streaming Intel FPGA IP for PCI Express. When the Debug Toolkit is enabled via the Enable Debug Toolkit parameter, the Hard IP Reconfiguration Interface is automatically enabled.