Arria V Device Overview

ID 683440
Date 11/20/2020
Public
Document Table of Contents

1.13.1. HPS Features

The HPS consists of a dual-core Arm* Cortex* -A9 MPCore* processor, a rich set of peripherals, and a shared multiport SDRAM memory controller, as shown in the following figure.

Figure 12. HPS with Dual-Core Arm* Cortex* -A9 MPCore* Processor


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