Stratix® 10 Embedded Memory User Guide

ID 683423
Date 3/29/2024
Document Table of Contents

2.4.1. Parity Bit

The following describes the parity bit support for M20K blocks:
  • 8 parity bits are generated through the ECC encoder based on 32-bit input data width, resulting in up to a total of 40 bits of data width.
  • You can inject and flip the parity bits by using the ECC parity flip feature.