Stratix® 10 Embedded Memory User Guide

ID 683423
Date 3/29/2024
Document Table of Contents

2.13. Initial Value of Read and Write Address Registers

In Stratix® 10 devices, the M20K blocks does not have freeze register (frzreg) in hardware to clear the address registers after entering user mode. This results in a non-deterministic address value in hardware before you can send any valid address. Hence, the address registers have been initialized to ‘X’ in the simulation model.

The figure below is a waveform illustrating the behavior of the values of the address registers initialized to ‘X’ for a simple dual-port RAM with registered output.

Figure 22. Simple Dual-Port RAM with Registered Output Timing Diagram