2.6.1. Forwarding Logic
With coherent read feature and forwarding logic, you can coherently read out the data, perform operations (arithmetic or logical or both) on top of the data content, and write the data back to the same memory location within a single clock cycle.
With the coherent read feature enabled and forwarding logic implemented, the output of M20K blocks can be either unregistered or registered. To match the latency of the coherency circuitry within the hardware boundary of the M20K blocks, you may need to manually add the additional pipeline registers on the wren and wraddress paths, which is described in the following table:
|Output Register||Additional Pipeline Registers on wren and wraddress|
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