Intel® Arria® 10 Device Overview

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ID 683332
Date 2/14/2022
Public
Document Table of Contents

Maximum Resources

Table 5.   Maximum Resource Counts for Intel® Arria® 10 GX Devices (GX 160, GX 220, GX 270, GX 320, and GX 480)
Resource Product Line
GX 160 GX 220 GX 270 GX 320 GX 480
Logic Elements (LE) (K) 160 220 270 320 480
ALM 61,510 80,330 101,620 119,900 183,590
Register 246,040 321,320 406,480 479,600 734,360
Memory (Kb) M20K 8,800 11,740 15,000 17,820 28,620
MLAB 1,050 1,690 2,452 2,727 4,164
Variable-precision DSP Block 156 192 830 985 1,368
18 x 19 Multiplier 312 384 1,660 1,970 2,736
PLL Fractional Synthesis 6 6 8 8 12
I/O 6 6 8 8 12
17.4 Gbps Transceiver 12 12 24 24 36
GPIO 3 288 288 384 384 492
LVDS Pair 4 120 120 168 168 222
PCIe Hard IP Block 1 1 2 2 2
Hard Memory Controller 6 6 8 8 12
Table 6.   Maximum Resource Counts for Intel® Arria® 10 GX Devices (GX 570, GX 660, GX 900, and GX 1150)
Resource Product Line
GX 570 GX 660 GX 900 GX 1150
Logic Elements (LE) (K) 570 660 900 1,150
ALM 217,080 251,680 339,620 427,200
Register 868,320 1,006,720 1,358,480 1,708,800
Memory (Kb) M20K 36,000 42,620 48,460 54,260
MLAB 5,096 5,788 9,386 12,984
Variable-precision DSP Block 1,523 1,687 1,518 1,518
18 x 19 Multiplier 3,046 3,374 3,036 3,036
PLL Fractional Synthesis 16 16 32 32
I/O 16 16 16 16
17.4 Gbps Transceiver 48 48 96 96
GPIO 3 696 696 768 768
LVDS Pair 4 300 300 384 384
PCIe Hard IP Block 2 2 4 4
Hard Memory Controller 16 16 16 16
3 The number of GPIOs does not include transceiver I/Os. In the Intel® Quartus® Prime software, the number of user I/Os includes transceiver I/Os.
4 Each LVDS I/O pair can be used as differential input or output.

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