Serial Lite III Streaming Intel® FPGA IP User Guide

ID 683330
Date 11/01/2021

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5.1.3. Serial Lite III Streaming IP Core Duplex Core

For Intel® Arria® 10 and Intel® Stratix® 10 devices, the duplex core consists of source and sink cores interfaced with the Transceiver Native PHY in Intel® Arria® 10 devices, L-Tile/H-Tile Transceiver Native PHY Intel® Stratix® 10, and Intel® Stratix® 10 E-Tile Transceiver Native PHY FPGA IP cores in PCS gearbox mode.

For Stratix V and Arria V GZ devices, the duplex core is composed of source and sink cores interfaced with the Interlaken PHY v18.1 IP core in duplex mode.