A newer version of this document is available. Customers should click here to go to the newest version.
- 5.1.4. Interlaken PHY IP Duplex Core or Native PHY IP Duplex Core - Interlaken Mode or PCS Gearbox Mode
- 6.1.1. Standard Clocking Mode in Serial Lite III Streaming Intel® FPGA IP Core ( Intel® Stratix® 10 Devices)
- 6.2.1. Advanced Clocking Mode Structure for Serial Lite III Streaming Intel FPGA IP Core ( Intel® Stratix® 10 Devices)
2.2.1. Continuous Mode
The Serial Lite III Streaming link operating in continuous mode accepts and transmits user data over the link, and presents it at the user interface at the receiving link at the same rate and without gaps in the stream, if user logic does not de-assert data valid signal as part of the stream. However, the streaming interface stops operating in continuous mode if user logic de-asserts the data valid signal in the middle of data transfer and there is no guarantee that the end-point sink is able to replicate the exact data pattern of the source. When operating in this mode, a link implementing the protocol looks like a data pipe that can transparently forward all data presented on the user interface to the far end of the link.
Continuous mode is appropriate for applications that require a simple interface to transmit a single, high bandwidth data stream. An example of this application is sensor data links for radar and wireless infrastructure. With this mode, data converters can connect to either end of the link with minimal interface logic.
Did you find the information on this page useful?