Visible to Intel only — GUID: kar1497651063779
Ixiasoft
A.1. Modify the Intel® Stratix® 10 SX SoC Development Kit to use a battery for the BBRAM
A.2. Modify the Intel® Stratix® 10 SX SoC Development Kit HPS DDR4 memory width and ECC configuration using the Golden Hardware Reference Design project
A.3. Safety and Regulatory Information
A.4. Compliance Information
Visible to Intel only — GUID: kar1497651063779
Ixiasoft
4.7.4. HDMI
Pin Name | Schematic Signal Name | Direction | Description |
---|---|---|---|
PIN_AP9 | HDMIREFCLK_P | Input | REFCLK_GXBR4C_CHTP |
PIN_AP10 | HDMIREFCLK_N | Input | REFCLK_GXBR4C_CHTN |
PIN_BC4 | HDMI_LANE_CLKN | Output | GXBR4C_TX_CH5N |
PIN_BC3 | HDMI_LANE_CLKP | Output | GXBR4C_TX_CH5P |
PIN_BF2 | HDMI_LANE_N2 | Output | GXBR4C_TX_CH4N |
PIN_BF1 | HDMI_LANE_P2 | Output | GXBR4C_TX_CH4P |
PIN_BE4 | HDMI_LANE_N1 | Output | GXBR4C_TX_CH3N |
PIN_BE3 | HDMI_LANE_P1 | Output | GXBR4C_TX_CH3P |
PIN_BG4 | HDMI_LANE_N0 | Output | GXBR4C_TX_CH2N |
PIN_BG3 | HDMI_LANE_P0 | Output | GXBR4C_TX_CH2P |
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