Stratix® 10 SX SoC Development Kit User Guide

Download PDF
ID 683303
Date 6/06/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Development Kit Components 5. Board Test System A. Additional Information B. Document Revision History for the Stratix® 10 10 SX SoC Development Kit User Guide
1. Overview x
1.1. General Development Kit Description 1.2. Recommended Operating Conditions 1.3. Handling the Development Kit
2. Getting Started x
2.1. Installing Quartus® Prime Software 2.2. Installing the Intel® FPGA Download Cable 2.3. Installing the Intel SoC Embedded Development Suite (EDS) 2.4. Installing the Stratix® 10 SX SoC Development Kit Package
3. Development Kit Setup x
3.1. Inspect the Development Kit 3.2. Default Setup of the Development Kit 3.3. MAX® 10 System Controller Updates
4. Development Kit Components x
4.1. Development Kit Feature Summary 4.2. Board Components 4.3. Stratix® 10 SoC Device Overview 4.4. MAX® 10 System Controller Overview 4.5. FPGA Configuration 4.6. General User Input/Output 4.7. Connectors and Interfaces 4.8. Daughter Cards 4.9. System Memory 4.10. System Power
4.7. Connectors and Interfaces x
4.7.1. PCIe* Slot 4.7.2. ZQSFP+ 4.7.3. SFP+ 4.7.4. HDMI 4.7.5. SDI Port 4.7.6. MXP 4.7.7. Intel® FPGA Download Cable Direct Port (Debug Port) 4.7.8. FMC+ A/B Slot 4.7.9. FMC+ A/B LVDS Interfaces (LPC Pins) 4.7.10. LMK05028 Jitter Attenuator 4.7.11. FPGA-IOMAX10 Interface
4.8. Daughter Cards x
4.8.1. HPS IO-48 OOBE Daughter Card 4.8.2. HPS IO-48 NAND Flash Daughter Card 4.8.3. HPS Boot Flash Card
4.8.3. HPS Boot Flash Card x
4.8.3.1. Boot QSPI Flash Daughter Card 4.8.3.2. Boot MicroSD Daughter Card 4.8.3.3. Boot eMMC Daughter Card
4.9. System Memory x
4.9.1. FPGA Memory (DDR4 SO-DIMM) 4.9.2. HPS Memory (External 4 GB HILO x72 DDR4) 4.9.3. HPS I2C Interface
4.10. System Power x
4.10.1. Power Supply Options 4.10.2. Power Sequence 4.10.3. Power Distribution Network
5. Board Test System x
5.1. Preparing the Board 5.2. Running the BTS 5.3. Using the BTS
5.3. Using the BTS x
5.3.1. The Configure Menu 5.3.2. The GPIO Tab 5.3.3. The QSFP/SFP Tab 5.3.4. The PCIE Tab 5.3.5. The MXP Tab 5.3.6. The FMCA Tab 5.3.7. The FMCB Tab 5.3.8. The DDR4 Tab 5.3.9. Power Monitor 5.3.10. The Clock Control
A. Additional Information x
A.1. Modify the Stratix® 10 SX SoC Development Kit to use a battery for the BBRAM A.2. Modify the Stratix® 10 SX SoC Development Kit HPS DDR4 memory width and ECC configuration using the Golden Hardware Reference Design project A.3. Safety and Regulatory Information A.4. Compliance Information
A.3. Safety and Regulatory Information x
A.3.1. Safety Warnings A.3.2. Safety Cautions
A.4. Compliance Information x
A.4.1. Compliance and Conformity Statements
1. Overview
2. Getting Started
3. Development Kit Setup
4. Development Kit Components
5. Board Test System
A. Additional Information
B. Document Revision History for the Stratix® 10 10 SX SoC Development Kit User Guide

4.7.8. FMC+ A/B Slot

Table 20.  FMC+ A Slot FPGA Pin Map
Pin Name Schematic Signal Name Direction Description
PIN_AP41 FAGBTCLK0M2CP Input REFCLK_GXBL1C_CHTP
PIN_AP40 FAGBTCLK0M2CN Input REFCLK_GXBL1C_CHTN
PIN_BC46 FAD5C2MN Output GXBR1C_TX_CH5N
PIN_BC47 FAD5C2MP Output GXBR1C_TX_CH5P
PIN_BD44 FAD5M2CN Input GXBR1C_RX_CH5N
PIN_BD45 FAD5M2CP Input GXBR1C_RX_CH5P
PIN_BF48 FAD4C2MN Output GXBR1C_TX_CH4N
PIN_BF49 FAD4C2MP Output GXBR1C_TX_CH4P
PIN_BC42 FAD4M2CN Input GXBR1C_RX_CH4N
PIN_BC43 FAD4M2CP Input GXBR1C_RX_CH4P
PIN_BE46 FAD3C2MN Output GXBR1C_TX_CH3N
PIN_BE47 FAD3C2MP Output GXBR1C_TX_CH3P
PIN_BE42 FAD3M2CN Input GXBR1C_RX_CH3N
PIN_BE43 FAD3M2CP Input GXBR1C_RX_CH3P
PIN_BG46 FAD2C2MN Output GXBR1C_TX_CH2N
PIN_BG47 FAD2C2MP Output GXBR1C_TX_CH2P
PIN_BG42 FAD2M2CN Input GXBR1C_RX_CH2N
PIN_BG43 FAD2M2CP Input GXBR1C_RX_CH2P
PIN_BF44 FAD1C2MN Output GXBR1C_TX_CH1N
PIN_BF45 FAD1C2MP Output GXBR1C_TX_CH1P
PIN_BJ42 FAD1M2CN Input GXBR1C_RX_CH1N
PIN_BJ43 FAD1M2CP Input GXBR1C_RX_CH1P
PIN_BJ45 FAD0C2MN Output GXBR1C_TX_CH0N
PIN_BJ46 FAD0C2MP Output GXBR1C_TX_CH0P
PIN_BH40 FAD0M2CN Input GXBR1C_RX_CH0N
PIN_BH41 FAD0M2CP Input GXBR1C_RX_CH0P
PIN_AT41 CLEARNER_XVRR_122.88MHZ_P Input REFCLK_GXBL1C_CHBP
PIN_AT40 CLEARNER_XVRR_122.88MHZ_N Input REFCLK_GXBL1C_CHBN
PIN_AK41 FAGBTCLK1M2CP Input REFCLK_GXB1D_CHTP
PIN_AK40 FAGBTCLK1M2CN Input REFCLK_GXB1D_CHTN
PIN_AU46 FAD11C2MN Output GXBR1D_TX_CH5N
PIN_AU47 FAD11C2MP Output GXBR1D_TX_CH5P
PIN_AV44 FAD11M2CN Input GXBR1D_RX_CH5N
PIN_AV45 FAD11M2CP Input GXBR1D_RX_CH5P
PIN_AY48 FAD10C2MN Output GXBR1D_TX_CH4N
PIN_AY49 FAD10C2MP Output GXBR1D_TX_CH4P
PIN_AU42 FAD10M2CN Input GXBR1D_RX_CH4N
PIN_AU43 FAD10M2CP Input GXBR1D_RX_CH4P
PIN_AW46 FAD9C2MN Output GXBR1D_TX_CH3N
PIN_AW47 FAD9C2MP Output GXBR1D_TX_CH3P
PIN_AY44 FAD9M2CN Input GXBR1D_RX_CH3N
PIN_AY45 FAD9M2CP Input GXBR1D_RX_CH3P
PIN_BB48 FAD8C2MN Output GXBR1D_TX_CH2N
PIN_BB49 FAD8C2MP Output GXBR1D_TX_CH2P
PIN_AW42 FAD8M2CN Input GXBR1D_RX_CH2N
PIN_AW43 FAD8M2CP Input GXBR1D_RX_CH2P
PIN_BA46 FAD7C2MN Output GXBR1D_TX_CH1N
PIN_BA47 FAD7C2MP Output GXBR1D_TX_CH1P
PIN_BB44 FAD7M2CN Input GXBR1D_RX_CH1N
PIN_BB45 FAD7M2CP Input GXBR1D_RX_CH1P
PIN_BD48 FAD6C2MN Output GXBR1D_TX_CH0N
PIN_BD49 FAD6C2MP Output GXBR1D_TX_CH0P
PIN_BA42 FAD6M2CN Input GXBR1D_RX_CH0N
PIN_BA43 FAD6M2CP Input GXBR1D_RX_CH0P
PIN_AM41 FAGBTCLK3M2CP Input REFCLK_GXBL1D_CHBP
PIN_AM40 FAGBTCLK3M2CN Input REFCLK_GXBL1D_CHBN
PIN_AF41 FAGBTCLK2M2CP Input REFCLK_GXBL1E_CHBP
PIN_AF40 FAGBTCLK2M2CN Input REFCLK_GXBL1E_CHBN
PIN_AM48 FAD17C2MN Output GXBR1E_TX_CH5N
PIN_AM49 FAD17C2MP Output GXBR1E_TX_CH5P
PIN_AK44 FAD17M2CN Input GXBR1E_RX_CH5N
PIN_AK45 FAD17M2CP Input GXBR1E_RX_CH5P
PIN_AN46 FAD16C2MN Output GXBR1E_TX_CH4N
PIN_AN47 FAD16C2MP Output GXBR1E_TX_CH4P
PIN_AM44 FAD16M2CN Input GXBR1E_RX_CH4N
PIN_AM45 FAD16M2CP Input GXBR1E_RX_CH4P
PIN_AP48 FAD15C2MN Output GXBR1E_TX_CH3N
PIN_AP49 FAD15C2MP Output GXBR1E_TX_CH3P
PIN_AN42 FAD15M2CN Input GXBR1E_RX_CH3N
PIN_AN43 FAD15M2CP Input GXBR1E_RX_CH3P
PIN_AT48 FAD14C2MN Output GXBR1E_TX_CH2N
PIN_AT49 FAD14C2MP Output GXBR1E_TX_CH2P
PIN_AP44 FAD14M2CN Input GXBR1E_RX_CH2N
PIN_AP45 FAD14M2CP Input GXBR1E_RX_CH2P
PIN_AR46 FAD13C2MN Output GXBR1E_TX_CH1N
PIN_AR47 FAD13C2MP Output GXBR1E_TX_CH1P
PIN_AT44 FAD13M2CN Input GXBR1E_RX_CH1N
PIN_AT45 FAD13M2CP Input GXBR1E_RX_CH1P
PIN_AV48 FAD12C2MN Output GXBR1E_TX_CH0N
PIN_AV49 FAD12C2MP Output GXBR1E_TX_CH0P
PIN_AR42 FAD12M2CN Input GXBR1E_RX_CH0N
PIN_AR43 FAD12M2CP Input GXBR1E_RX_CH0P
PIN_AH41 FAGBTCLK4M2CP Input REFCLK_GXBL1E_CHBP
PIN_AH40 FAGBTCLK4M2CN Input REFCLK_GXBL1E_CHBN
PIN_AK38 FAGBTCLK5M2CP Input REFCLK_GXBL1F_CHTP
PIN_AK37 FAGBTCLK5M2CN Input REFCLK_GXBL1F_CHTN
PIN_AG46 FAD23C2MN Output GXBR1F_TX_CH5N
PIN_AG47 FAD23C2MP Output GXBR1F_TX_CH5P
PIN_AE42 FAD23M2CN Input GXBR1F_RX_CH5N
PIN_AE43 FAD23M2CP Input GXBR1F_RX_CH5P
PIN_AF48 FAD22C2MN Output GXBR1F_TX_CH4N
PIN_AF49 FAD22C2MP Output GXBR1F_TX_CH4P
PIN_AG42 FAD22M2CN Input GXBR1F_RX_CH4N
PIN_AG43 FAD22M2CP Input GXBR1F_RX_CH4P
PIN_AJ46 FAD21C2MN Output GXBR1F_TX_CH3N
PIN_AJ47 FAD21C2MP Output GXBR1F_TX_CH3P
PIN_AF44 FAD21M2CN Input GXBR1F_RX_CH3N
PIN_AF45 FAD21M2CP Input GXBR1F_RX_CH3P
PIN_AH48 FAD20C2MN Output GXBR1F_TX_CH2N
PIN_AH49 FAD20C2MP Output GXBR1F_TX_CH2P
PIN_AJ42 FAD20M2CN Input GXBR1F_RX_CH2N
PIN_AJ43 FAD20M2CP Input GXBR1F_RX_CH2P
PIN_AL46 FAD19C2MN Output GXBR1F_TX_CH1N
PIN_AL47 FAD19C2MP Output GXBR1F_TX_CH1P
PIN_AH44 FAD19M2CN Input GXBR1F_RX_CH1N
PIN_AH45 FAD19M2CP Input GXBR1F_RX_CH1P
PIN_AK48 FAD18C2MN Output GXBR1F_TX_CH0N
PIN_AK49 FAD18C2MP Output GXBR1F_TX_CH0P
PIN_AL42 FAD18M2CN Input GXBR1F_RX_CH0N
PIN_AL43 FAD18M2CP Input GXBR1F_RX_CH0P
PIN_AM38 REFCLK0_FMC_P Input REFCLKI_GXBL1F_CHBP
PIN_AM37 REFCLK0_FMC_N Input REFCLKI_GXBL1F_CHBN
Table 21.  FMC+ B Slot FPGA Pin Map
Pin Name Schematic Signal Name Direction Description
PIN_V38 FBGBTCLK0M2CP Input REFCLK_GXBL1K_CHTP
PIN_V37 FBGBTCLK0M2CN Input REFCLK_GXBL1K_CHTN
PIN_W46 FBD5C2MN Output GXBR1K_TX_CH5N
PIN_W47 FBD5C2MP Output GXBR1K_TX_CH5P
PIN_Y44 FBD5M2CN Input GXBR1K_RX_CH5N
PIN_Y45 FBD5M2CP Input GXBR1K_RX_CH5P
PIN_AB48 FBD4C2MN Output GXBR1K_TX_CH4N
PIN_AB49 FBD4C2MP Output GXBR1K_TX_CH4P
PIN_W42 FBD4M2CN Input GXBR1K_RX_CH4N
PIN_W43 FBD4M2CP Input GXBR1K_RX_CH4P
PIN_AA46 FBD3C2MN Output GXBR1K_TX_CH3N
PIN_AA47 FBD3C2MP Output GXBR1K_TX_CH3P
PIN_AB44 FBD3M2CN Input GXBR1K_RX_CH3N
PIN_AB45 FBD3M2CP Input GXBR1K_RX_CH3P
PIN_AD48 FBD2C2MN Output GXBR1K_TX_CH2N
PIN_AD49 FBD2C2MP Output GXBR1K_TX_CH2P
PIN_AA42 FBD2M2CN Input GXBR1K_RX_CH2N
PIN_AA43 FBD2M2CP Input GXBR1K_RX_CH2P
PIN_AC46 FBD1C2MN Output GXBR1K_TX_CH1N
PIN_AC47 FBD1C2MP Output GXBR1K_TX_CH1P
PIN_AD44 FBD1M2CN Input GXBR1K_RX_CH1N
PIN_AD45 FBD1M2CP Input GXBR1K_RX_CH1P
PIN_AE46 FBD0C2MN Output GXBR1K_TX_CH0N
PIN_AE47 FBD0C2MP Output GXBR1K_TX_CH0P
PIN_AC42 FBD0M2CN Input GXBR1K_RX_CH0N
PIN_AC43 FBD0M2CP Input GXBR1K_RX_CH0P
PIN_Y38 CLEARNER_XVRL_122.88MHZ_P Input REFCLK_GXBL1K_CHBP
PIN_Y37 CLEARNER_XVRL_122.88MHZ_N Input REFCLK_GXBL1K_CHBN
PIN_AB41 FBGBTCLK1M2CP Input REFCLK_GXB1L_CHTP
PIN_AB40 FBGBTCLK1M2CN Input REFCLK_GXB1L_CHTN
PIN_R46 FBD11C2MN Output GXBR1L_TX_CH5N
PIN_R47 FBD11C2MP Output GXBR1L_TX_CH5P
PIN_M44 FBD11M2CN Input GXBR1L_RX_CH5N
PIN_M45 FBD11M2CP Input GXBR1L_RX_CH5P
PIN_P48 FBD10C2MN Output GXBR1L_TX_CH4N
PIN_P49 FBD10C2MP Output GXBR1L_TX_CH4P
PIN_R42 FBD10M2CN Input GXBR1L_RX_CH4N
PIN_R43 FBD10M2CP Input GXBR1L_RX_CH4P
PIN_T48 FBD9C2MN Output GXBR1L_TX_CH3N
PIN_T49 FBD9C2MP Output GXBR1L_TX_CH3P
PIN_P44 FBD9M2CN Input GXBR1L_RX_CH3N
PIN_P45 FBD9M2CP Input GXBR1L_RX_CH3P
PIN_U46 FBD8C2MN Output GXBR1L_TX_CH2N
PIN_U47 FBD8C2MP Output GXBR1L_TX_CH2P
PIN_T44 FBD8M2CN Input GXBR1L_RX_CH2N
PIN_T45 FBD8M2CP Input GXBR1L_RX_CH2P
PIN_V48 FBD7C2MN Output GXBR1L_TX_CH1N
PIN_V49 FBD7C2MP Output GXBR1L_TX_CH1P
PIN_U42 FBD7M2CN Input GXBR1L_RX_CH1N
PIN_U43 FBD7M2CP Input GXBR1L_RX_CH1P
PIN_Y48 FBD6C2MN Output GXBR1L_TX_CH0N
PIN_Y49 FBD6C2MP Output GXBR1L_TX_CH0P
PIN_V44 FBD6M2CN Input GXBR1L_RX_CH0N
PIN_V45 FBD6M2CP Input GXBR1L_RX_CH0P
PIN_AD41 FBGBTCLK5M2CP Input REFCLK_GXBL1L_CHBP
PIN_AD40 FBGBTCLK5M2CN Input REFCLK_GXBL1L_CHBN
PIN_V41 FBGBTCLK2M2CP Input REFCLK_GXBL1M_CHBP
PIN_V40 FBGBTCLK2M2CN Input REFCLK_GXBL1M_CHBN
PIN_J46 FBD17C2MN Output GXBR1M_TX_CH5N
PIN_J47 FBD17C2MP Output GXBR1M_TX_CH5P
PIN_F44 FBD17M2CN Input GXBR1M_RX_CH5N
PIN_F45 FBD17M2CP Input GXBR1M_RX_CH5P
PIN_H48 FBD16C2MN Output GXBR1M_TX_CH4N
PIN_H49 FBD16C2MP Output GXBR1M_TX_CH4P
PIN_J42 FBD16M2CN Input GXBR1M_RX_CH4N
PIN_J43 FBD16M2CP Input GXBR1M_RX_CH4P
PIN_L46 FBD15C2MN Output GXBR1M_TX_CH3N
PIN_L47 FBD15C2MP Output GXBR1M_TX_CH3P
PIN_H44 FBD15M2CN Input GXBR1M_RX_CH3N
PIN_H45 FBD15M2CP Input GXBR1M_RX_CH3P
PIN_K48 FBD14C2MN Output GXBR1M_TX_CH2N
PIN_K49 FBD14C2MP Output GXBR1M_TX_CH2P
PIN_L42 FBD14M2CN Input GXBR1M_RX_CH2N
PIN_L43 FBD14M2CP Input GXBR1M_RX_CH2P
PIN_N46 FBD13C2MN Output GXBR1M_TX_CH1N
PIN_N47 FBD13C2MP Output GXBR1M_TX_CH1P
PIN_K44 FBD13M2CN Input GXBR1M_RX_CH1N
PIN_K45 FBD13M2CP Input GXBR1M_RX_CH1P
PIN_M48 FBD12C2MN Output GXBR1M_TX_CH0N
PIN_M49 FBD12C2MP Output GXBR1M_TX_CH0P
PIN_N42 FBD12M2CN Input GXBR1M_RX_CH0N
PIN_N43 FBD12M2CP Input GXBR1M_RX_CH0P
PIN_Y41 FBGBTCLK4M2CP Input REFCLK_GXBL1N_CHBP
PIN_Y40 FBGBTCLK4M2CN Input REFCLK_GXBL1N_CHBN
PIN_P41 FBGBTCLK3M2CP Input REFCLK_GXBL1N_CHTP
PIN_P40 FBGBTCLK3M2CN Input REFCLK_GXBL1N_CHTN
PIN_B44 FBD23C2MN Output GXBR1N_TX_CH5N
PIN_B45 FBD23C2MP Output GXBR1N_TX_CH5P
PIN_B40 FBD23M2CN Input GXBR1N_RX_CH5N
PIN_B41 FBD23M2CP Input GXBR1N_RX_CH5P
PIN_C46 FBD22C2MN Output GXBR1N_TX_CH4N
PIN_C47 FBD22C2MP Output GXBR1N_TX_CH4P
PIN_A42 FBD22M2CN Input GXBR1N_RX_CH4N
PIN_A43 FBD22M2CP Input GXBR1N_RX_CH4P
PIN_E46 FBD21C2MN Output GXBR1N_TX_CH3N
PIN_E47 FBD21C2MP Output GXBR1N_TX_CH3P
PIN_C42 FBD21M2CN Input GXBR1N_RX_CH3N
PIN_C43 FBD21M2CP Input GXBR1N_RX_CH3P
PIN_D48 FBD20C2MN Output GXBR1N_TX_CH2N
PIN_D49 FBD20C2MP Output GXBR1N_TX_CH2P
PIN_E42 FBD20M2CN Input GXBR1N_RX_CH2N
PIN_E43 FBD20M2CP Input GXBR1N_RX_CH2P
PIN_G46 FBD19C2MN Output GXBR1N_TX_CH1N
PIN_G47 FBD19C2MP Output GXBR1N_TX_CH1P
PIN_D44 FBD19M2CN Input GXBR1N_RX_CH1N
PIN_D45 FBD19M2CP Input GXBR1N_RX_CH1P
PIN_F48 FBD18C2MN Output GXBR1N_TX_CH0N
PIN_F49 FBD18C2MP Output GXBR1N_TX_CH0P
PIN_G42 FBD18M2CN Input GXBR1N_RX_CH0N
PIN_G43 FBD18M2CP Input GXBR1N_RX_CH0P
PIN_T41 REFCLK1_FMC_P Input REFCLK_GXBL1N_CHBP
PIN_T40 REFCLK1_FMC_N Input REFCLK_GXBL1N_CHBN
Level Two Title