Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 12/04/2023
Public
Document Table of Contents
Give Feedback

2.6.3. Using Synopsys* Design Constraint (SDC) on RTL Files

SDC-on-RTL supports SDC files written using SDC 2.1-compliant SDC commands and can support general Tcl code that the Tcl console can parse. These SDC files target your design netlist, allowing you to target hierarchical ports.

Note:
  • Only the Timing Analyzer Tcl console supports the sdc_ext Tcl package.
  • Intel® Quartus® Prime software GUI-based constraint authoring is currently disabled for files with RTL_SDC_FILE assignments. This means the timing constraint entry dialogs are not available. You must enter timing constraints only by typing them in.
  • Issues, such as incorrect options or other syntax errors, found in the SDC-on-RTL SDC files are posted as warnings in the Intel® Quartus® Prime software GUI and message console.

For more information about how to manage SDC-on-RTL SDC files, refer to the following topics: