Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 12/04/2023
Public
Document Table of Contents

2.7.2.2.1. Global Signal Visualization Report

For Intel® Stratix® 10 and Intel Agilex® 7 designs, you can access the Global Signal Visualization report to view global signal routing and clock sector utilization in an interactive heat-map. This report allows you to track the routing and placement of each individual clock. You can use this data to analyze global signal routing congestion issues, and to debug global signal placement and routing failures.

View global clock tree implementation details and assess capacity to add more global signals to the design. In cases of clock tree synthesis errors, the report can also show targeted regions for failing signals, and competing signals that are contributing to routing congestion.

The interactive heatmap color gradients show clock sector congestion of the clock signals terminating inside the sector. Hover the cursor over a clock signal in the table to highlight the clocks sectors and routing elements. Select a clock signal in the table to dim all irrelevant sectors and routing elements, while highlighting only the clock's sectors and routing elements. The global clock signal routing on different layers displays in the report's stacked layer view.

Figure 78. Global Routing Wire Utilization (Single Layer)
Figure 79. Heat Map Sector and Routing Wire Utilization (All Layers)

Filter the display to Show Routing Utilization and Show Sector Utilization. The content of the table changes based on the selections you make in the heatmap. You can search for Signal Names, and then select the signal names to display its properties in the lower pane. Select any signal to Locate in other tools.

Figure 80. Signals Names and Property Details