AN 798: Partial Reconfiguration with the Arria 10 HPS

ID 683034
Date 1/25/2017
Public
Document Table of Contents
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Importing the GHRD Project

  1. Extract the .tar file provided with the SoC EDS GHRD hardware example, as follows:
    $ mkdir ghrd_pr 
    $ cd ghrd_pr/ 
    $ tar xvfz ~/intelFPGA/16.1/embedded/examples/hardware/ \
    a10_soc_devkit_ghrd/tgz/ghrd_10as066n2_16_1_*.tar.gz 
    
    (…) 
    
    $ which quartus 
    ~/intelFPGA_pro/16.1/quartus/bin/quartus 
    $ quartus &
  2. Open the GHRD Quartus project file.
  3. Open the GHRD Qsys design saved in the ghrd_10as066n2.qsys file with the Qsys Pro tools. Point to Tools and click Qsys Pro to start the tool.
  4. The copied design is in the standard Qsys tool format and must be converted to the Qsys Pro format. A dialog box confirming this action pops up automatically after opening the Qsys design. Click OK to perform the conversion.
    Figure 5. Converting to Qsys Pro Format
  5. Save the converted design and click Generate RTL to ensure that the conversion process was successful.
  6. Close the Qsys Pro tool.
  7. In the main Quartus window, point to Project and click Revisions. Create a new revision for the PR base configuration. Double click << new revision >> and enter the revision information as shown below. This revision is based on the existing revision.
    Figure 6. Creating the Base Revision
  8. Click OK to create the revision and open it as the current revision.
  9. To set the revision type of the new revision, point to Assignments, click Settings, choose the General category, and change the Revision Type field to Partial Reconfiguration – Base as shown below.
    Figure 7. Setting the Revision Type