F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 12/04/2023
Public
Document Table of Contents

4.2.2.2. RX Strict SFD Checking

The F-Tile Ethernet Intel® FPGA Hard IP RX MAC checks all incoming packets for a correct Start byte (0xFB).

If you turn on Enable strict preamble check in the F-Tile Ethernet Intel® FPGA Hard IP parameter editor, the RX MAC requires all RX packets to have an Ethernet standard preamble (0x55_55_55_55_55_55). If you turn on Enable strict SFD check, the RX MAC requires all RX packets to have an Ethernet standard Start Frame Delimiter (0xD5).

Strict checking reduces the incidence of runt packets caused by bit errors on the line. However, do not use strict checking in applications where custom preamble values or SFD values are needed.