F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 12/04/2023
Public
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7.5.2. RX MAC Segmented Client Interface with Enabled Passthrough and RX CRC Forwarding

The RX MAC segmented client interface is available when you select Enable Preamble Passthrough in the parameter editor.

For all data rates, the IP core presents the preamble bits received on the first 8 bytes of the o_rx_mac_data, that is o_rx_mac_data[63:0]. When Remove CRC Bytes is deselected, the CRC bytes are equivalent to the last 4 bytes of data while in the segment containing the EOP o_rx_endofpacket is asserted.

Table 47.  RX MAC Field Positions in o_rx_mac_data with Preamble Passthrough Enabled
Attention:

10G/25G requires multiple transfer cycle for header data.

The (') symbol in the 10GE/25GE o_rx_mac_data column represents transfer on the subsequent cycle.

The ('') symbol in the 10GE/25GE o_rx_mac_data column represents transfer on the 2nd subsequent cycle.

100GE/200GE/400GE

o_rx_mac_data

40GE/50GE

o_rx_mac_data

10GE/25GE

o_rx_mac_data

MAC Field Note
[7:0] [7:0]' [7:0]'' Preamble [7:0] 0x55
[15:8] [15:8]' [15:8]'' Preamble [15:8] 0x55
[23:16] [23:16]' [23:16]'' Preamble [23:16] 0x55
[31:24] [31:24]' [31:24]'' Preamble [31:24] 0x55
[39:32] [39:32]' [39:32]'' Preamble [39:32] 0x55
[47:40] [47:40]' [47:40]'' Preamble [47:40] 0x55
[55:48] [55:48]' [55:48]'' Preamble [55:48] 0x55
[63:56] [63:56]' [63:56]'' Preamble [63:56] 0xD5 (SFD)
[71:64] [71:64]' [7:0]' Dest Addr[47:40]  
[79:72] [79:72]' [15:8]' Dest Addr[39:32]  
[87:80] [87:80]' [23:16]' Dest Addr[31:24]  
[95:88] [95:88]' [31:24]' Dest Addr[23:16]  
[103:96] [103:96]' [39:32]' Dest Addr[15:8]  
[111:104] [111:104]' [47:40]' Dest Addr[7:0]  
[119:112] [119:112]' [55:48]' Src Addr[47:40] When you turn on Source Address Insertion, contents are replaced by txmac_saddr unless i_tx_skip_crc is high.
[127:120] [127:120]' [63:56]' Src Addr[39:32]
[135:128] [7:0] [7:0] Src Addr[31:24]
[143:136] [15:8] [15:8] Src Addr[23:16]
[151:144] [23:16] [23:16] Src Addr[15:8]
[159:152] [31:24] [31:24] Src Addr[7:0]
[167:160] [39:32] [39:32] Length/Type[15:0]
[175:168] [47:40] [47:40] Length/Type[7:0]
[…:176] [127:48] [63:48]