F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 12/04/2023
Public
Document Table of Contents

7.3.4. RX MAC Avalon ST Client Interface Status

Figure 40. RX MAC Status and ErrorsThe figure shows how status and error information are presented with RX packets as they arrive.

The status valid port is provided for backward compatibility, but always asserts when o_rx_endofpacket is asserted and valid.