LVDS Tunneling Protocol and Interface (LTPI) IP User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs

ID 844310
Date 8/15/2025
Public
Document Table of Contents

5. Troubleshooting and Debugging Issues

This section describes debug methods that support debugging your simulation design example. The following troubleshooting table provides additional guidance.
Table 48.  Troubleshooting Steps for Simulation Design Example
Issue Troubleshooting Checklist
LTPI link is not established Follow these troubleshooting steps to resolve the issue:​
  1. Enable Enable Status Interface and Enable Error Interface from the General tab in the IP configuration of your design.​
  2. Monitor the pll_locked signal. Confirm that all specified clock inputs are correct​.
  3. Monitor the link_aligned signal. If this signal is low, it indicates that the HPM and SCM LVDS connection is not properly established.​
  4. Once the link alignment is established, the local_link_state signal should transition through the following states, in the following order:
    1. link_detect
    2. link_speed
    3. advertise
    4. configuration
    5. operational​
  5. Check the similarity of the HPM and SCM capabilities when the design does not proceed from the configuration state to the operational state.