LVDS Tunneling Protocol and Interface (LTPI) IP User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs

ID 844310
Date 8/15/2025
Public
Document Table of Contents

3.4.2. Simulation Output

The figure below shows the results after the completion of a successful design example simulation using the QuestaSim* simulator.

Figure 24. Read/Write Transaction from I2C Channel through I/O FrameShows the read/write transaction from the I2C channel carries over time through the I/O frame.
Figure 25. Read/Write Transaction from Data Channel through Data FrameShows the read/write transaction from the data channel carries over time through the data frame.
Figure 26. Read/Write Transaction from GPIO Channel through I/O FrameShows the read/write transaction from the GPIO channel carries over time through the I/O frame.
Figure 27. Simulation Waveform—LTPI Channel ControllerShows the waveform at the controller after the completion of a successful example design simulation using the ModelSim* simulator. Refer to the Signal Description section for more details on signal.
Figure 28. Simulation Waveform—LTPI Channel TargetShows the waveform at the target after the completion of a successful design example simulation using the ModelSim* simulator. Refer to the Signal Description section for more details on signal.