AN 814: Intel Arria 10 Two x8-Lane JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design

ID 683731
Date 1/30/2018
Document Table of Contents Nios® II Subsystem Address Map

You can access the address mapping of the peripherals in Nios® II subsystem by clicking on the Address Map tab in the Platform Designer window.

Figure 13.  Nios® II Subsystem Address Map View in Platform Designer

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