AN 814: Intel Arria 10 Two x8-Lane JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design

ID 683731
Date 1/30/2018
Document Table of Contents

1.2.1. Hardware Setup

Perform the following steps to setup the hardware for the reference design:

  1. Install the FMC Loopback Card module to the FMC port A (J1) on the Intel® Arria® 10 FPGA development board.
  2. Do not change the default switching settings.
    Note: For more details about default switching settings, refer to the Intel® Arria® 10 FPGA development board user guide.
  3. Connect the micro-USB cable to the micro-USB connector (J3) on the development board.
  4. Connect the power adapter shipped with the development board to power supply jack (J13).
  5. Turn On the power for the Intel® Arria® 10 FPGA development board.
    The hardware system is now ready for programming.
    Figure 1. Reference Design Hardware Setup

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