AN 814: Intel Arria 10 Two x8-Lane JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design

ID 683731
Date 1/30/2018
Document Table of Contents Frequency Checker

The frequency checker module is added in this design to measure the device clock, PHY clock generated from the transceiver parallel clock for the TX path and the recovered clock generated from the CDR for the RX path. This module is useful for debugging and it ensures that the frequency of measured clocks is as close as the desired clock.