1. Intel® Arria® 10 Two x8-Lane JESD204B IP Cores (Duplex) Multi-Device Synchronization Reference Design
220.127.116.11. Frequency Checker
The frequency checker module is added in this design to measure the device clock, PHY clock generated from the transceiver parallel clock for the TX path and the recovered clock generated from the CDR for the RX path. This module is useful for debugging and it ensures that the frequency of measured clocks is as close as the desired clock.
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