AN 814: Intel Arria 10 Two x8-Lane JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design

ID 683731
Date 1/30/2018
Document Table of Contents Test Pattern Generator

The test pattern generator has three patterns options; PRBS, alternate checkerboard, or RAMP wave. The test pattern is sent to the transport layer when test mode is selected. By default, the PRBS pattern test mode is selected.