1. Intel® Arria® 10 Two x8-Lane JESD204B IP Cores (Duplex) Multi-Device Synchronization Reference Design
18.104.22.168. Test Pattern Generator
The test pattern generator has three patterns options; PRBS, alternate checkerboard, or RAMP wave. The test pattern is sent to the transport layer when test mode is selected. By default, the PRBS pattern test mode is selected.
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