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Ixiasoft
Visible to Intel only — GUID: mwh1410471184323
Ixiasoft
2.2. Initial Compiler Settings
You can easily adjust this trade-off to focus the Compiler's effort more on shortening the total compile time, reducing device resource utilization, or maximizing timing performance.
The initial FPGA device selection and Compiler settings have a very significant impact on design performance and optimization. You should also consider the following guidelines for specifying initial settings before compiling your design for the first time in the Intel® Quartus® Prime software.
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