Nios® V Processor Reference Manual

ID 683632
Date 4/01/2024
Document Table of Contents Address Map

The address map for memories and peripherals in a Nios® V/c processor system is design dependent. The following addresses are part of the processor:
  • Reset Address
  • Exception Address

You can specify the Reset Address in Platform Designer during system configuration. You can modify the Exception Address stored in the mvtec register.