Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 12/12/2022
Public

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7.1.5. Bridges Between Avalon® and AXI Interfaces

When designing a Platform Designer system, you can make connections between AXI and Avalon® interfaces without the use of explicitly-instantiated bridges; the interconnect provides all necessary bridging logic. However, this does not prevent the use of explicit bridges to separate the AXI and Avalon® domains. Using an explicit Avalon® memory mapped bridge to separate the AXI and Avalon® domains reduces the amount of bridging logic in the interconnect at the expense of concurrency, as the following example shows:

Figure 236.  Avalon® Memory Mapped Pipeline Bridge Between Avalon® Memory-Mapped and AXI Domains