Intel® Stratix® 10 SEU Mitigation User Guide

ID 683602
Date 12/30/2022

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3.2. SDM ECC Error Signals Behavior

When the Intel® Stratix® 10 device detects an SDM ECC error, the generic_sdm_valid_out signal of the Advanced SEU Detection IP goes high for one clock cycle.

Always monitor the generic_sdm_valid_out signal. When the generic_sdm_valid_out signal goes high, retrieve the SDM ECC error message content from the generic_sdm_data_out signal of the Advanced SEU Detection IP.