- Updated subsection: CRAM Error Detection and Correction.
- Updated subsection: Scrubbing.
- Added note in Advanced SEU Detection IP Core.
- Added note in Minimum SEU interval setting in Intel Quartus Prime SEU Software Settings.
- Removed the footnote in Table: Advanced SEU Detection Intel® FPGA IP Core Current Release Information.
- Increased the error message queue storage from a maximum of four messages to eight messages.
- Added information about the actual minimum SEU interval being higher than the value you specify.
- Added support for SDM ECC error detection.
- Added section about the Intel® Quartus® Prime software SEU FIT reports.
- Added steps to analyze SEU errors using Signal Tap.
- Added support for injecting double adjacent errors.
- Updated the Advanced SEU Detection IP core ports.
- Updated the error message queue table to update the description for bit 31:29.
- Updated the topic about internal scrubbing to improve clarity and add information about uncorrectable errors.
- Updated the topic about priority scrubbing to improve clarity.
- Updated the quartus_fid command and arguments, and added examples.
- Updated the Intel® Quartus® Prime SEU software settings to add the option to turn on Allow SEU fault injection.
- Updated the off-chip sensitivity processing ports information of the Advanced SEU Detection IP.
- Updated the following signal names:
- seu_avst_data to avst_seu_source_data
- seu_avst_valid to avst_seu_source_valid
- seu_avst_ready to avst_seu_source_ready
- Updated "Avalon-MM" and "Avalon-ST" to " Avalon® memory-mapped interface" and " Avalon® streaming interface".
||Updated the procedures for using the Fault Injection Debugger to improve clarity.
- Updated the procedures in the Programming Sensitivity Map Header File into Memory topic from using the Convert Programming File tool to using the Programming File Generator tool.
- Updated the topic about failure rates to correct the number of years of one billion hours.
- Removed the footnote about future Intel® Quartus® Prime support for double adjacent errors and multiple bit errors. The features are now supported in the Intel® Quartus® Prime software.
- Updated the footnote to the "Error location" entry in the Error Message Queue Description table to clarify the different return values for single bit error with or without internal scrubbing.
- Updated the Advanced SEU Detection Intel® FPGA IP to version 19.1.0:
- Changed the IP name from "Advanced SEU Detection Intel® Stratix® 10 FPGA IP" to "Advanced SEU Detection Intel® FPGA IP".
- Updated the description for the SEU error fifo depth parameter to remove the condition that it is available only if you turn on Use on-chip processing. SEU error fifo depth parameter is available for on-chip and off-chip sensitivity processing.
||Updated the table listing the error message queue description to clarify that the bit position of the sector address and error location fields on the seu_avst_data signal.
||Added a note to the reset port regarding IP core instantiation guidelines in the tables about Advanced SEU Detection IP core on-chip and off-chip sensitivity processing ports.
- Removed correction support for double adjacent errors.
- Updated the topic about the error message queue to remove mention of error count in the error message queue.
- Added a topic about internal scrubbing.
- Added a topic about priority scrubbing.
- Updated the topic about setting the Intel® Quartus® Prime SEU settings to improve clarity.
- Added procedures for enabling priority scrubbing.
- Updated the allowed value of the Largest ASD region ID used parameter from "1 to 255" to "1 to 32".
- Removed correction support for multiple bit errors.
- Corrected the signal names in the topic about off-chip lookup sensitivity processing from seu_avst_ready to seu_avst_valid.
- Updated IP core name from "Intel® FPGA Stratix® 10 Advanced SEU Detection IP" to "Advanced SEU Detection Intel® FPGA Stratix® 10 IP".
- Added smh argument to the Fault Injection command-line interface command.
- Updated the user command in Fault Injection command-line interface description.
- Added Failure Rates section.
- Added Constraining Regions for Fault Injection section.
- Updated argument to inject error on specific location.
- Updated the ECC status flag signals for eSRAM blocks in the Memory Blocks Error Correction Code Support topic.