4.3. SDI Status Signals
Signal |
Width |
Direction |
Description |
---|---|---|---|
rx_anc_data | [(20N–1):0] | Output |
Received ancillary data.
|
rx_anc_error | [3:0] | Output |
Ancillary data or checksum error.
|
rx_anc_valid | [3:0] | Output |
Ancillary data valid. Asserted to accompany data ID (DID), secondary data ID/data block number (SDID/DBN), data count (DC), and user data words (UDW) on rx_anc_data.
|
rx_status | [10:0] | Output | This signal is active low for the transceiver-based device families.
Receiver status:
For non HD-SDI dual link versions, only bits [4:0] are active. For transceiver only receiver block in HD-SDI dual link versions, only bits [6:5] and [1:0] are active. This signal indicates lock of the PLL when the transceiver is training from a refclk source. This signal may oscillate when the transceiver is correctly locked to the incoming data in HD-SDI or 3G-SDI modes. In SD-SDI modes, maintain this signal at PLL locked at all times. For rx_status[3] and rx_status[8], the TRS spacing is not required to meet a particular SMPTE standard, but it must be consistent over time for this signal to remain active. |
tx_status | [(N– 1):0] | Output | This signal is active low for the transceiver-based device families. Transmitter status, which indicates the transmitter PLL has locked to the tx_serial_refclk signal. |
The following figures show the behavior of the rx_anc_data signal.