SDI IP Core User Guide

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ID 683587
Date 8/20/2020
Public
Document Table of Contents
Document Table of Contents x
Product Discontinuance Notification 1. SDI IP Core Overview 2. SDI IP Core Getting Started 3. Functional Description 4. SDI IP Core Signals 5. SDI IP Core User Guide Archives 6. Document Revision History for the SDI IP Core User Guide A. Constraints B. Clocking C. Receive and Retransmit
1. SDI IP Core Overview x
1.1. Release Information 1.2. Device Family Support 1.3. General Description 1.4. Resource Utilization
2. SDI IP Core Getting Started x
2.1. Installing and Licensing Intel® FPGA IP Cores 2.2. IP Catalog and Parameter Editor
2.1. Installing and Licensing Intel® FPGA IP Cores x
2.1.1. Intel® FPGA IP Evaluation Mode
2.2. IP Catalog and Parameter Editor x
2.2.1. Generating IP Cores ( Intel® Quartus® Prime Standard Edition) 2.2.2. Parameterizing the SDI IP Core 2.2.3. SDI IP Core Parameters
3. Functional Description x
3.1. Transmitter 3.2. Receiver 3.3. Transceiver 3.4. Locking to the Incoming SDI Stream 3.5. SDI Receiving Video Format Specification
3.3. Transceiver x
3.3.1. Transmitter Clocks 3.3.2. Receiver Clocks 3.3.3. Transmitter Transceiver Interface 3.3.4. Receiver Transceiver Interface
4. SDI IP Core Signals x
4.1. SDI Clock Signals 4.2. SDI Interface Signals 4.3. SDI Status Signals 4.4. SDI Transceiver Dynamic Reconfiguration Signals
A. Constraints x
A.1. Specifying Timing Analyzer Constraints A.2. Constraints for the SDI Soft Transceiver
A.1. Specifying Timing Analyzer Constraints x
A.1.1. Constraints for SDI IP Core Using Stratix IV Device
B. Clocking x
B.1. Clocking Versions
C. Receive and Retransmit x
C.1. Loopback FIFO Buffer
Product Discontinuance Notification
1. SDI IP Core Overview
2. SDI IP Core Getting Started
3. Functional Description
4. SDI IP Core Signals
5. SDI IP Core User Guide Archives
6. Document Revision History for the SDI IP Core User Guide
A. Constraints
B. Clocking
C. Receive and Retransmit

1.4. Resource Utilization

The table below lists the typical resource utilization for various parameters of the SDI IP core with the Intel® Quartus® Prime Standard Edition software.

Note: The resource utilization of the IP core is based on the bidirectional interface settings unless otherwise specified.
Table 5.  Resource Utilization
Device Video Standard LEs Combinational ALUTs Logic Registers
Arria II GX SD-SDI — 839 680
HD-SDI — 978 833
3G HD-SDI — 1,259 1,015
Dual-Link HD-SDI — 2,029 1,711
Dual standard receiver — 1,257 926
Dual standard transmitter — 267 180
Triple standard — 1,891 1,305
Arria V SD-SDI — 1,189 920
HD-SDI — 1,185 910
3G HD-SDI — 1,444 1,142
Dual-Link HD-SDI — 2,446 1,880
Dual standard receiver — 1,605 1,175
Dual standard transmitter — 349 269
Triple standard — 2,273 1,677
Cyclone IV GX (EP4CGX15, EP4CGX30) SD-SDI 916
Cyclone IV GX (EP4CGX50, EP4CGX75, EP4CGX110, and EP4CGX150) SD-SDI — 1,129 671
HD-SDI — 1,164 670
3G HD-SDI — 1,409 790
Dual-Link HD-SDI — 2,515 1,467
Dual standard receiver — 1,479 755
Dual standard transmitter — 364 229
Triple standard — 2,235 1,121
Cyclone V SD-SDI — 1,140 832
HD-SDI — 1,122 808
3G HD-SDI — 1,402 997
Dual-Link HD-SDI — 2,351 1,696
Dual standard receiver — 1,539 1,042
Dual standard transmitter — 352 260
Triple standard — 2,217 1,508
Stratix IV SD-SDI — 839 680
HD-SDI — 978 833
3G HD-SDI — 1,259 1,015
Dual-Link HD-SDI — 2,029 1,711
Dual standard receiver — 1,257 926
Dual standard transmitter — 267 180
Triple standard — 1,891 1,305
Stratix V SD-SDI — 913 707
HD-SDI — 955 703
3G HD-SDI — 1,126 823
Dual-Link HD-SDI — 2,049 1,522
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